Power IC Architect (2025 – )

I am currently working as a Power IC Architect at the Danish fabless semiconductor company, Lotus Microsystems, a 2020 DTU-spinout.

Senior Electronics Design Engineer (2022 – 2025)

Individual contributor and ownership of IC design projects of integrated power converters and PMICs.

• PMIC design including system architecture, analog design & layout as well as ESD design and power-stage & block-level layout work.
• PCB design and layout in OrCad/Allegro & KiCad; designs for internal use including test, verification, qualification and external evaluation boards.
• Linux server administration.
• Go-to Git guru and command-line wizard; supporting a team of 10 engineers. Set up processes for working effectively and efficiently with Git for analog design IP version control.
• IC design tool jockey handling everything related Cadence Virtuoso and building a scalable and flexible setup for ~10 IC design engineers

GN Hearing, Denmark, Ballerup

Analog IC Engineer (2020 – 2022)

As an Analog IC Engineer at GN Hearing I worked primarily on an RF ASIC used for magnetic induction near-field link between hearing aids. My work spanned from individual contribution to close teamwork with the remaining analog and digital design engineers as well as close collaboration with external and internal stakeholders.

• Worked with medical MDR-regulated devices with high demands for regulatory compliance.
• Mixed-signal verification of RF ASIC for magnetic induction communication and mixed-signal tool-flow setup for DSP ASIC. For the mixed-signal flow I used Spectre and Incisive as well as TCL for testbench stimulation and verification.
• Floorplan and ESD-planning of RF ASIC in collaboration with technical project lead.
• Design of various general purpose analog circuits including comparators, operational amplifiers
• Specified components, specifications and capabilities for internal test board of RF NFMI IC with a focus on automated testing
• Automated python test flow for verifying block-level and chip-level specifications according to a detailed verification plan.
• Created an automated mixed-signal simulation suite for running Cadence simulations extracting verification results and reporting.

CERN, Switzerland, Geneva

Intern, back-end electronics (Summer 2019)

Tasks including developing a fully automated test bench in Python for evaluating commercial power supplies. The verification campaign was used to evaluate possible vendors in a public bid for supplying the back-end power supplies for the 2024 CERN LHC upgrade.

Technical Assistant (2018 – 2020)

I was responsible for internal development of electrical circuitry, intended for internal use as well as development of prototypes/demonstrators for research projects.

• Design of a synchronous rectifier using both PLL and DLLs using DTU-designed integrated circuits.
• Design of a 1 W 230V offline flyback power converter with primary-side regulation.

ICEPower, Denmark, Søborg

Student Assistant (2015 – 2018)

As a student assistant in the R&D group of ICEpower A/S, had the task of developing and realizing various test jigs for EMC, safety and regular product testing. Furthermore I modified an ICEpower audio amplifier to create a capacitive driver with a 1/f closed-loop gain for constant output power vs. frequency. This included manual rework of the audio amplifier as well as design modifications, debugging and testing.

Another task included creating a power-stage for circumventing bus bumping caused by power-rail run-back currents. I designed the amplifier and created the corresponding power-stage and verified the functionality of its capabilities in reducing bus pumping.

I also carried out tests of ICEpower’s products, including audio performance verification via the Audio Precision audio analyzers as well as power supply verification.